Title :
Thermal simulation and power map modeling sensitivity study for chipset silicon
Author :
Lee, Eng Kwong ; Sasidaran, Dhinesh ; Cheang, Wai Keong ; Deo, Song Chin ; Ng, Kiat Hong ; Lee, Chee Siong
Author_Institution :
Intel Microelectron., Penang
Abstract :
This paper describes the thermal characterization and power map methodology on chipset silicon die. The on-die power map affects the overall thermal gradient and heat spreading effect from the die to the package top, which in turns drives the cooling requirements needed to meet package cooling target. This paper demonstrates the power-thermal simulation with different power map resolution and examines its effects on the hot spot on the die.
Keywords :
cooling; integrated circuit modelling; sensitivity analysis; thermal analysis; thermal management (packaging); chipset silicon; cooling requirements; heat spreading effect; package cooling; power map modeling; power-thermal simulation; Cooling; Energy consumption; Heating; Packaging; Performance analysis; Power dissipation; Predictive models; Silicon; Temperature; Thermal engineering;
Conference_Titel :
Electronic Materials and Packaging, 2007. EMAP 2007. International Conference on
Conference_Location :
Daejeon
Print_ISBN :
978-1-4244-1909-8
Electronic_ISBN :
978-1-4244-1910-4
DOI :
10.1109/EMAP.2007.4510282
