Digital background auto-calibration of DAC non-linearity in pipelined ADCs

In this paper, a digital background auto-calibration method that computes mismatch between the elements of the inter-stage multiplying-digital-to-analog converter (MDAC) as commonly employed in pipelined analog-to-digital converters (ADCs) and then applies a linearizing algorithm in the digital domain is described. The calibration does not interrupt the normal operation of the ADC and is performed periodically, thus inherently able to track changes in the operating conditions of the device, a major limitation of the one-time calibration approaches. This scheme requires an extra MDAC element and a reference element. The MDAC mismatch is digitized by the succeeding stages of the pipeline and subsequently digitally extracted. The accuracy of the calibration algorithm depends on the number of clock periods used for each calibration session. Longer sessions lead to better accuracy with the trade-off being additional digital circuitry. System simulation results demonstrative validity of the approach.