Title :
Converting PLC instruction sequence into logic circuit: A preliminary study
Author :
Ichikawa, Shuichi ; Akinaka, Masanori ; Ikeda, Ryo ; Yamamoto, Hiroshi
Author_Institution :
Dept. of Knowledge-based Inf. Eng., Toyohashi Univ. of Technol.
Abstract :
By implementing a control program with hard-wired logic using reconfigurable devices (e.g., FPGA), a flexible and highly responsive system can be realized. This new system also contributes to securing intellectual property, while reducing implementation space and cost. This study outlines a converter that translates PLC instruction sequence into logic description. A design framework is also described, which integrates control logic and peripheral functions on an FPGA chip. A productive ladder program was examined with Mitsubishi Electric FX2N PLC and Altera APEX20KE FPGA, and the derived logic designs were shown to fit into an actual FPGA chip. A straightforward sequential design was estimated to be 79 times faster than PLC, while a performance-oriented flat design was estimated to be 43 times faster than sequential design (i.e., 3397 times faster than PLC)
Keywords :
field programmable gate arrays; hardware description languages; industrial property; peripheral interfaces; programmable controllers; Altera APEX20KE FPGA; FPGA chip; Mitsubishi Electric FX2N PLC; PLC instruction sequence; control logic; intellectual property; logic circuit; logic description; performance-oriented flat design; peripheral functions; productive ladder program; reconfigurable devices; sequential design; Control systems; Field programmable gate arrays; Hardware design languages; Intellectual property; Logic circuits; Logic design; Logic devices; Programmable control; Reconfigurable logic; Space technology;
Conference_Titel :
Industrial Electronics, 2006 IEEE International Symposium on
Conference_Location :
Montreal, Que.
Print_ISBN :
1-4244-0496-7
Electronic_ISBN :
1-4244-0497-5
DOI :
10.1109/ISIE.2006.296082