Title :
An Inter-subsystem Data Transfer Mechanism Based on a New Computer Architecture with Single CPU and Dual Bus
Author :
Wei, Wang ; Fengjing, Shao
Author_Institution :
Coll. of Inf. Eng., Qingdao Univ., Qingdao, China
Abstract :
Focusing on the architecture characteristics of the new computer architecture with high-security sCPU-dBUS, this paper designs and implements an inter-subsystem data transfer mechanism based on the new high-security operating system with internal networking structure netOS-I which is only used by the sCPU-dBUS. The data transfer mechanism mainly contains inter-subsystem data transfer interface, inter-subsystem data transfer protocol and operation and management of transit cache memory.
Keywords :
cache storage; computer architecture; operating systems (computers); security of data; storage management; system buses; computer architecture; dual bus; high-security operating system; inter-subsystem data transfer interface; inter-subsystem data transfer mechanism; inter-subsystem data transfer protocol; internal networking structure; netOS-I; single CPU; transit cache memory management; Computer architecture; Computer security; Data engineering; Design engineering; Educational institutions; IP networks; Kernel; Memory management; Operating systems; Protection; computer architecture; data; operating system;
Conference_Titel :
Computer Science and Engineering, 2009. WCSE '09. Second International Workshop on
Conference_Location :
Qingdao
Print_ISBN :
978-0-7695-3881-5
DOI :
10.1109/WCSE.2009.742
