Design of an ultra-low-power current source

Author

Galeano, Edgar Mauricio Camacho ; Montoro, Carlos Galup ; Schneider, Márcio Cherem

Author_Institution

Dept. de Engenharia Eletrica, Univ. Fed. de Santa Catarina, Brazil

Volume

1

fYear

2004

fDate

23-26 May 2004

Abstract

This paper presents the design of an ultra low-power self-biased current source. We have designed a 400pA current reference in both 1.5μm and 0.35μm CMOS technologies. The association of a very simple topology, an efficient design methodology, and low output conductance trapezoidal transistors has resulted in area of 0.046mm² and power consumption around of 2nW. Experimental results for the 1.5μm CMOS technology validate the design and show that the current source can operate from supply voltage down to 1.2V with a regulation better than 8%/V of supply voltage.

Keywords

CMOS integrated circuits; integrated circuit design; low-power electronics; reference circuits; transistors; 0.35 microns; 1.2 V; 1.5 microns; 2 nW; 400 pA; CMOS technologies; current reference; efficient design; low output conductance; power consumption; self-biased current source; trapezoidal transistors; ultra-low-power current source; Analog circuits; CMOS analog integrated circuits; CMOS technology; Design methodology; Energy consumption; Low voltage; MOSFET circuits; Resistors; Semiconductor device modeling; Topology;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on

Print_ISBN

0-7803-8251-X

Type

conf

DOI

10.1109/ISCAS.2004.1328199

Filename

1328199