Chip test optimization using defect clustering information

The authors recently proposed an adaptive wafer-probe testing approach which used defect clustering information on the wafer to optimize die test cost and quality. They show that this information can also be captured and used to optimize the testing of packaged chips. The effectiveness of the proposed approach is analyzed for negative binomial defect statistics. The results show that a three- to five-fold improvement in defect levels can be easily obtained for the same test costs. It is also possible to separate out chips with defect levels over an order of magnitude better than the best possible method without using defect clustering information.<>