Title :
Traffic-balanced IP mapping algorithm for 2D-mesh On-Chip-Networks
Author :
Lin, Ting-Jung ; Lin, Shu-Yen ; Wu, An-Yeu Andy
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei
Abstract :
Intellectual Properties (IPs) mapping algorithms for On-Chip-Networks (OCNs) allocate a set of IPs onto given network topologies. The existing mapping algorithms limit a single IP to connect to a single router. Hence, the IPs with large communication volumes will result in heavy traffic loads of certain routers. Those routers may become hot spots due to high power density, which affects the reliability of chips. In this paper, new Network Interfaces (NIs) were proposed to solve the aforementioned problem. Traffic-Balanced Mapping Algorithm (TBMAP) is also proposed based on the new NIs. The traffic loads then become more decentralized, and the traffic of all the routers on the chip can be balanced without sacrificing the networking performance. The TBMAP has short runtime to achieve balanced network traffic loads, which leads to the enhanced performance of OCNs. The experimental results show that at least 24% communication time is saved for real applications.
Keywords :
logic design; network interfaces; network routing; network topology; network-on-chip; tree searching; 2D-mesh on-chip-network; branch and bound search; intellectual property; network interface; network router; network topology; system-on-chip design; traffic-balanced IP mapping algorithm; Costs; Hardware; Intellectual property; Multiprocessor interconnection networks; Network interfaces; Network topology; Runtime; Scalability; Telecommunication network reliability; Telecommunication traffic; Interconnection networks; network interfaces;
Conference_Titel :
Signal Processing Systems, 2008. SiPS 2008. IEEE Workshop on
Conference_Location :
Washington, DC
Print_ISBN :
978-1-4244-2923-3
Electronic_ISBN :
1520-6130
DOI :
10.1109/SIPS.2008.4671762
