A structural technique for fault-protection in asynchronous interfaces

Asynchronous VLSI circuits are reactive to input stimuli, and can be vulnerable to transient faults at their inputs. The ability to tolerate such faults is crucial for interface circuits, or transducers. The author proposes a structural protection technique based on: (1) synthesizing a correct transducer circuit from its original specification made under the correct environment assumption, and (2) augmenting it by a structurally separate wrapping of a special protection logic. This logic consists of the implementation of a perfect environment image and a special adjudicator component. The perfect environment model provides aliasing for the signals coming from the real failure-prone environment. The function of the adjudicator in its minimal case is to enable synchronization between the inputs coming from the real environment and their aliases generated inside the transducer. This approach greatly simplifies syntheses as compared to the one emerging directly from Dill´s conformance by D.L. Diel (1988).<>