DocumentCode :
3354625
Title :
Design and Analysis of Matching Circuit Architectures for a Closest Match Lookup
Author :
Kupzog, Friederich ; Blume, Holger ; Noll, Tobias ; McLaughlin, Kieran ; Sezer, Sakir ; McCanny, John
Author_Institution :
RWTH Aachen University
fYear :
2006
fDate :
19-25 Feb. 2006
Firstpage :
56
Lastpage :
56
Abstract :
The massive growth in the use of Internet and the development of new real-time applications has put considerable strain on the techniques currently used for the lookup and retrieval of information essential for classification, routing, Quality of Service (QoS) and Internet security. This paper investigates the design and implementation of a number of closest value lookup circuits, suitable for deployment in a range of networking applications. Detailed descriptions of a number of matching circuit architectures are given and the results of hardware implementations for the Altera Stratix II FPGA are discussed and evaluated.
Keywords :
Bandwidth; Circuit analysis; Computer architecture; Field programmable gate arrays; Hardware; Information retrieval; Memory management; Propagation delay; Quality of service; Web and internet services;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Telecommunications, 2006. AICT-ICIW '06. International Conference on Internet and Web Applications and Services/Advanced International Conference on
Print_ISBN :
0-7695-2522-9
Type :
conf
DOI :
10.1109/AICT-ICIW.2006.76
Filename :
1602188
Link To Document :
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