Low-complexity polynomials modulo integer with linearly incremented variable

Computation of a polynomial function modulo integer with linearly incremented variable is required by certain number generators like, e.g., an interleaver of the turbo decoder in telecommunication field. In this paper, a systematic method for deriving hardware structures for such computation is proposed. The method is derived by recursively applying principles of simplifying modulo operations in a limited domain. With the aid of the proposed method, efficient hardware structures can be derived for any polynomials and significant savings can be obtained in the hardware complexity when compared to the straightforward modulo arithmetic. As a case study, the method is applied on the 3G long term evolution (LTE) interleaver.