DocumentCode :
3354934
Title :
Speculative register promotion using advanced load address table (ALAT)
Author :
Lin, Jin ; Chen, Tong ; Hsu, Wei-Chung ; Yew, Pen-Chung
Author_Institution :
Dept. of Comput. Sci. & Eng., Minnesota Univ., Duluth, MN, USA
fYear :
2003
fDate :
23-26 March 2003
Firstpage :
125
Lastpage :
134
Abstract :
The pervasive use of pointers with complicated patterns in C programs often constrains compiler alias analysis to yield conservative register allocation and promotion. Speculative register promotion with hardware support has the potential to more aggressively promote memory references into registers in the presence of aliases. This paper studies the use of the advanced load address table (ALAT), a data speculation feature defined in the IA-64 architecture, for speculative register promotion. An algorithm for speculative register promotion based on partial redundancy elimination is presented. The algorithm is implemented in Intel´s open research compiler (ORC). Experiments on SPEC CPU2000 benchmark programs are conducted to show that speculative register promotion can improve performance of some benchmarks by 1% to 7%.
Keywords :
C language; memory architecture; optimising compilers; parallel programming; parallelising compilers; software performance evaluation; storage allocation; ALAT; C programs; IA-64 architecture; Intel open research compiler; ORC; SPEC CPU2000 benchmark programs; advanced load address table; compiler alias analysis; hardware support; memory references; partial redundancy elimination; performance; speculative register promotion; Computer science; Delay; Hardware; Libraries; Optimizing compilers; Pattern analysis; Program processors; Registers; Runtime;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Code Generation and Optimization, 2003. CGO 2003. International Symposium on
Print_ISBN :
0-7695-1913-X
Type :
conf
DOI :
10.1109/CGO.2003.1191539
Filename :
1191539
Link To Document :
بازگشت