A new quantitative model to predict SILC-related disturb characteristics in flash E/sup 2/PROM devices

Author

De Blauwe, J. ; Van Houdt, J. ; Wellekens, D. ; Degraeve, R. ; Roussel, P. ; Haspeslagh, L. ; Deform, L. ; Groeseneken, G. ; Maes, H.E.

Author_Institution

IMEC, Leuven, Belgium

fYear

1996

fDate

8-11 Dec. 1996

Firstpage

343

Lastpage

346

Abstract

A new quantitative model is developed that allows an excellent prediction of the disturb behavior of tunnel oxide flash E/sup 2/PROM devices after write/erase cycling and provides a well-understood and consistent cell optimization procedure. This model requires as only input a measurement of the oxide quality on capacitors and transistors, and some basic cell characteristics.

Keywords

EPROM; circuit optimisation; integrated circuit measurement; integrated circuit modelling; integrated circuit reliability; leakage currents; tunnelling; Fowler-Nordheim tunneling; SILC-related disturb characteristics; bulk oxide traps; cell optimization procedure; flash E/sup 2/PROM devices; oxide quality; quantitative model; reliability; stress induced leakage current; tunnel oxide flash E/sup 2/PROM; write/erase cycling; Capacitors; Electronic mail; Leakage current; Nonvolatile memory; PROM; Predictive models; Stress; Testing; Tunneling; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1996. IEDM '96., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Print_ISBN

0-7803-3393-4

Type

conf

DOI

10.1109/IEDM.1996.553599

Filename

553599