Title :
A fixed transconductance bias technique for CMOS analog integrated circuits
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol., Chennai, India
Abstract :
A fixed transconductance bias circuit technique is proposed. This circuit forces the transconductance of a MOSFET operating in saturation to track the conductance of a precise off-chip resistor. Unlike its predecessors, the operation of this circuit does not depend on the square law of the MOSFET, and its performance does not degrade with variations in supply voltage and temperature. Simulation results in a 0.35 μm CMOS process are given.
Keywords :
CMOS analogue integrated circuits; MOSFET; circuit simulation; integrated circuit design; 0.35 micron; CMOS analog integrated circuits; MOSFET square law; MOSFET transconductance; conductance tracking; fixed transconductance bias circuit; precise off-chip resistor; supply voltage variation; temperature variation; CMOS analog integrated circuits; CMOS technology; FETs; MOS devices; MOSFET circuits; Mirrors; Resistors; Temperature; Threshold voltage; Transconductance;
Conference_Titel :
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
0-7803-8251-X
DOI :
10.1109/ISCAS.2004.1328281
