DocumentCode :
3355614
Title :
Pilot-aided Packet Synchronization and Single-Tone Parameter Estimation on an FPGA Platform
Author :
Özel, Ömür ; Vural, Mehmet ; Yilmaz, Ali Özgür
Author_Institution :
Elektrik ve Elektron. Muhendisligi Bolumu, ODTU, Ankara, Turkey
fYear :
2007
fDate :
11-13 June 2007
Firstpage :
1
Lastpage :
4
Abstract :
In this paper, an FPGA implementation in which packet synchronization is performed by transmitting pilot sequences will be explained. In addition, in order to recover the frequency offset between the frequencies of oscillators at the transmitter and the receiver, a PLL like structure is proposed.
Keywords :
field programmable gate arrays; frequency estimation; phase locked loops; synchronisation; FPGA; PLL like structure; frequency offset; oscillators; pilot-aided packet synchronization; single-tone parameter estimation; Bit error rate; Field programmable gate arrays; Frequency synchronization; Gaussian processes; Oscillators; Parameter estimation; Phase locked loops; Quadrature phase shift keying; Transmitters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing and Communications Applications, 2007. SIU 2007. IEEE 15th
Conference_Location :
Eskisehir
Print_ISBN :
1-4244-0719-2
Electronic_ISBN :
1-4244-0720-6
Type :
conf
DOI :
10.1109/SIU.2007.4298719
Filename :
4298719
Link To Document :
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