DocumentCode :
3355632
Title :
A low-voltage CMOS rail-to-rail operational amplifier using double p-channel differential input pairs
Author :
Huang, Chun-Jen ; Huang, Hong-Yi
Author_Institution :
Dept. of Electron. Eng., Fu-Jen Catholic Univ., Taipei, Taiwan
Volume :
1
fYear :
2004
fDate :
23-26 May 2004
Abstract :
This work presents a low-voltage CMOS amplifier. The amplifier combines a p-channel differential input pair and a level-shift p-channel differential input pair to obtain rail-to-rail signaling. Simulations using a 0.35 μm 2p4m CMOS process at 1 V supply voltage, the amplifier performs 76 dB dc gain, 5.27 MHz unit-gain bandwidth, 288 μW power dissipation and 84° phase margin at 15 pF output load.
Keywords :
CMOS analogue integrated circuits; amplifiers; circuit simulation; integrated circuit design; low-power electronics; 0.35 micron; 1 V; 15 pF; 288 muW; 5.27 MHz; 76 dB; CMOS process; dc gain; differential input combination; level-shift p-channel; low-voltage CMOS amplifier; output load; p-channel differential; phase margin; power dissipation; rail-to-rail signaling; unit-gain bandwidth; Bandwidth; CMOS process; Differential amplifiers; Operational amplifiers; Performance gain; Power amplifiers; Rail to rail amplifiers; Rail to rail inputs; Rail to rail operation; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
0-7803-8251-X
Type :
conf
DOI :
10.1109/ISCAS.2004.1328284
Filename :
1328284
Link To Document :
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