Title :
Low-power application-specific FFT processor for LTE applications
Author :
Patyk, Tomasz ; Guevorkian, D. ; Pitkanen, Teemu ; Jaaskelainen, Pekka ; Takala, Jarmo
Author_Institution :
Dolby Labs., Wroclaw, Poland
Abstract :
In this paper, we describe a processor architecture tailored to mixed-radix4/2/3 FFT algorithm. The proposed design supports all FFT sizes, namely 128-2048/1536, required by the LTE applications. The processor is based on the Transport Triggered Architecture processor architecture, which was customized with a set of function units, designed especially for the application at hand. The processor has been synthesized on an ASIC technology and both energy-efficiency and performance have been evaluated. The developed processor is programmable but shows energy-efficiency comparable to fixed-function ASIC implementations.
Keywords :
Long Term Evolution; fast Fourier transforms; mobile computing; parallel architectures; ASIC technology; LTE applications; fixed-function ASIC implementations; low-power application-specific FFT processor; mixed-radix4/2/3 FFT algorithm; transport triggered architecture processor architecture; Clocks; Computer architecture; Discrete Fourier transforms; Generators; Power demand; Radio frequency; Vectors; Application-Specific Integrated Circuit; Fast Fourier Transform; Long-Term Evolution; Parallel Architectures;
Conference_Titel :
Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII), 2013 International Conference on
Conference_Location :
Agios Konstantinos
DOI :
10.1109/SAMOS.2013.6621102
