DocumentCode :
3359155
Title :
A/D converter trends: Power dissipation, scaling and digitally assisted architectures
Author :
Murmann, B.
Author_Institution :
Stanford Univ., Stanford, CA
fYear :
2008
fDate :
21-24 Sept. 2008
Firstpage :
105
Lastpage :
112
Abstract :
This paper summarizes recent trends in the area of low-power A/D conversion. Survey data collected over the past eleven years indicates that the power efficiency of ADCs has improved on average by a factor of two every two years. A closer inspection on the impact of technology scaling is presented to explain the observed trend in the context of shrinking supply voltages and increasing device speed. Finally, a discussion on minimalistic and digitally assisted design approaches is used to sketch a route toward further improvements in ADC power efficiency and performance.
Keywords :
analogue-digital conversion; scaling circuits; digitally assisted architectures; low-power A-D converter; power dissipation; technology scaling; Application software; Bandwidth; Circuits; Energy resolution; Inspection; Power dissipation; Quantization; Radio frequency; Sampling methods; Scattering;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-2018-6
Electronic_ISBN :
978-1-4244-2019-3
Type :
conf
DOI :
10.1109/CICC.2008.4672032
Filename :
4672032
Link To Document :
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