DocumentCode
3359365
Title
Evaluating the impact of data encoding techniques on the power consumption in networks-on-chip
Author
Palma, J.C.S. ; Indrusiak, L.S. ; Moraes, F.G. ; Ortiz, A.G. ; Glesner, M. ; Reis, R.A.L.
Author_Institution
PPGC, UFRGS, Porto Alegre, Brazil
fYear
2006
fDate
2-3 March 2006
Abstract
This work addresses the problem of power consumption in networks-on-chip (NoCs). It investigates the reduction of dynamic power consumption through the reduction of transition activity using data coding techniques. Power macromodels for various NoC modules were built, allowing the estimation of the power consumption as a function of the transition activity at each module´s inputs. Such macromodels were embedded in a system model and a series of simulations were performed, aiming to analyze the trade-off between the power savings due to coding techniques versus the power consumption overhead due to the encoding and decoding modules.
Keywords
decoding; embedded systems; encoding; integrated circuit modelling; network-on-chip; NoC modules; data encoding techniques; decoding modules; dynamic power consumption reduction; embedded system; encoding modules; networks-on-chip; power macromodels; transition activity; CMOS technology; Decoding; Encoding; Energy consumption; Integrated circuit interconnections; Intelligent networks; Network-on-a-chip; Power system interconnection; Very large scale integration; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Emerging VLSI Technologies and Architectures, 2006. IEEE Computer Society Annual Symposium on
Conference_Location
Karlsruhe
Print_ISBN
0-7695-2533-4
Type
conf
DOI
10.1109/ISVLSI.2006.42
Filename
1602479
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