DocumentCode :
3359570
Title :
MEMS wafer-level vacuum packaging with transverse interconnects for CMOS integration
Author :
Lemoine, D. ; Cicek, P.-V. ; Nabki, F. ; El-Gamal, M.N.
Author_Institution :
McGill Univ., Montreal, QC
fYear :
2008
fDate :
21-24 Sept. 2008
Firstpage :
189
Lastpage :
192
Abstract :
A novel vacuum wafer-level packaging technology for micro-electromechanical systems (MEMS) is presented. It supports monolithic integration with electronics, and is suitable for different MEMS processes. Bulk-etched transverse feedthroughs are used to connect with the encapsulated systems. Silicon carbide is successfully used for membrane stress cancellation and improved hermeticity.
Keywords :
CMOS integrated circuits; encapsulation; integrated circuit interconnections; micromechanical devices; silicon compounds; wafer level packaging; wide band gap semiconductors; CMOS integration; MEMS wafer-level vacuum packaging; SiC; bulk-etched transverse; encapsulated systems; membrane stress cancellation; microelectromechanical systems; monolithic integration; silicon carbide; transverse interconnects; Biomembranes; CMOS technology; Electronics packaging; Microelectromechanical systems; Micromechanical devices; Monolithic integrated circuits; Silicon carbide; Vacuum systems; Vacuum technology; Wafer scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-2018-6
Electronic_ISBN :
978-1-4244-2019-3
Type :
conf
DOI :
10.1109/CICC.2008.4672055
Filename :
4672055
Link To Document :
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