DocumentCode
3359589
Title
A parallel architecture for hardware face detection
Author
Theocharides, T. ; Vijaykrishnan, N. ; Irwin, M.J.
Author_Institution
Cyprus Univ., Nicosia
fYear
2006
fDate
2-3 March 2006
Abstract
Face detection is a very important application in the field of machine vision. In this paper, we present a scalable parallel architecture which performs face detection using the AdaBoost algorithm. Experimental results show that the proposed architecture can detect faces with the same accuracy as the software implementation, on real-time video at a frame rate of 52 frames per second
Keywords
computer vision; face recognition; parallel architectures; AdaBoost algorithm; hardware face detection; machine vision; real-time video; scalable parallel architecture; Application software; Application specific integrated circuits; Cameras; Computer architecture; Face detection; Hardware; Machine vision; Parallel architectures; Robot vision systems; Security;
fLanguage
English
Publisher
ieee
Conference_Titel
Emerging VLSI Technologies and Architectures, 2006. IEEE Computer Society Annual Symposium on
Conference_Location
Karlsruhe
Print_ISBN
0-7695-2533-4
Type
conf
DOI
10.1109/ISVLSI.2006.10
Filename
1602492
Link To Document