• DocumentCode
    3360112
  • Title

    A 24GS/s 5-b ADC with closed-loop THA in 0.18μm SiGe BiCMOS

  • Author

    Lee, Jaesik ; Weiner, Joe ; Roux, Pascal ; Leven, Andreas ; Chen, Young-Kai

  • Author_Institution
    Alcatel-Lucent, Murray Hill, NJ
  • fYear
    2008
  • fDate
    21-24 Sept. 2008
  • Firstpage
    313
  • Lastpage
    316
  • Abstract
    A 5-b flash ADC with a closed-loop THA is implemented in 0.18-mum SiGe BiCMOS. A global shunt feedback THA and a current-weighted comparator allow the ADC to achieve wide resolution bandwidth of 6.5 GHz and high sampling rate up to 24 GS/s. The ADC shows an SNDR of 28 dB and an SFDR of 36 dB with a 1 GHz input sampled at 16 GS/s. It consumes 3.3 W from 3.6/3-V supplies and occupies 8.68 mm2 silicon area.
  • Keywords
    BiCMOS integrated circuits; Ge-Si alloys; analogue-digital conversion; comparators (circuits); sample and hold circuits; BiCMOS integrated circuit; SiGe; analog-digital converter; bandwidth 6.5 GHz; closed-loop THA; current-weighted comparator; flash ADC; global shunt feedback; power 3.3 W; size 0.18 mum; track and hold amplifier; word length 5 bit; Bandwidth; BiCMOS integrated circuits; Frequency; Germanium silicon alloys; High speed optical techniques; Optical feedback; Optical modulation; Optical receivers; Sampling methods; Silicon germanium;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    978-1-4244-2018-6
  • Electronic_ISBN
    978-1-4244-2019-3
  • Type

    conf

  • DOI
    10.1109/CICC.2008.4672084
  • Filename
    4672084
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3360112