Title :
A 9Gbit/s serial transceiver for on-chip global signaling over lossy transmission lines
Author :
Park, JunYoung ; Kang, Joshua ; Park, Sunghyun ; Flynn, Michael P.
Author_Institution :
Univ. of Michigan, Ann Arbor, MI
Abstract :
A 9 Gbit/s serial link transceiver for on-chip global signaling is presented. A transmitter serializes 8 b 1.125 Gbyte/s parallel data and transmits over 5.8 mm of lossy on-chip transmission line. The receiver de-serializes the data with the help of a digitally-tuned interpolator. An error checking block verifies the recovered and de-serialized data against the original data and counts the number of discrepancies. The prototype transceiver, implemented in 0.13 mum 8 metal CMOS, achieves 9 Gbit/s with four pre-defined data patterns and a measured BER is less than 10-10.
Keywords :
integrated circuit design; integrated circuit interconnections; transceivers; transmission lines; digitally-tuned interpolator; error checking block; lossy transmission lines; on-chip global signaling; serial transceiver; Clocks; Frequency; Phase locked loops; Power transmission lines; Propagation losses; Repeaters; Signal generators; Transceivers; Transmission lines; Transmitters;
Conference_Titel :
Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-2018-6
Electronic_ISBN :
978-1-4244-2019-3
DOI :
10.1109/CICC.2008.4672093
