Optimized 25 V, 0.34 m/spl Omega//spl middot/cm/sup 2/ very-thin-RESURF (VTR), drain extended IGFETs in a compressed BiCMOS process

Author

Chin-Yu Tsai ; Arch, J. ; Efland, T. ; Erdeljac, J. ; Hutter, L. ; Mitros, J. ; Yang, J.-Y. ; Yuan, H.-T.

Author_Institution

Corp. Res. & Dev., Texas Instrum. Inc., Dallas, TX, USA

fYear

1996

fDate

8-11 Dec. 1996

Firstpage

469

Lastpage

472

Abstract

The competitive PC peripheral application market drives the goal to develop a compressed, low-cost BiCMOS power technology with state-of-the-art specific-on-resistance (R/sub sp/) at the 20 V node. The 20 V rated lateral power device is difficult to optimize because modern VLSI processes tend to physically limit surface BV to about 13-19 V in planar devices. Here the structure performance is advanced by optimizing a Very-Thin-RESURF (VTR) region (VTR Xj=0.3 /spl mu/m). This work presents a planar VTR drain extended IGFET with best case BV=25 V and R/sub sp/=0.34 m/spl Omega//spl middot/cm/sup 2/@V/sub gs/=10 V using a compressed BiCMOS VLSI, 1 /spl mu/m technology. Structure variation and thermal performance are characterized.

Keywords

BiCMOS integrated circuits; VLSI; circuit optimisation; insulated gate field effect transistors; integrated circuit measurement; ion implantation; power integrated circuits; 1 mum; 25 V; MEDICI; TSUPREM; VT implants; compressed BiCMOS VLSI; lateral power device optimization; low-cost BiCMOS power technology; specific-on-resistance; structure performance; structure variation; thermal performance; very-thin-RESURF drain extended IGFETs; Back; BiCMOS integrated circuits; Body regions; Computational modeling; Electrons; Immune system; Implants; Medical simulation; Video recording; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1996. IEDM '96., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Print_ISBN

0-7803-3393-4

Type

conf

DOI

10.1109/IEDM.1996.553628

Filename

553628