DocumentCode
3360777
Title
DRAM-Specific Space of Memory Tests
Author
AL-Ars, Zaid ; Hamdioui, Said ; van de Goor, A. ; Gaydadjiev, Georgi ; Vollrath, Joerg
Author_Institution
Fac. of Electr. Eng., Math. & Comput. Sci., Delft Univ. of Technol.
fYear
2006
fDate
Oct. 2006
Firstpage
1
Lastpage
10
Abstract
DRAM testing has always been theoretically considered as a subset of general memory testing, despite the disagreement of this assumption with the DRAM test practice. This paper presents a recently developed space of DRAM faults that describes the unique aspects of DRAM behavior, it validates this fault space using extensive Spice simulation, and it identifies the memory tests necessary to detect these faults. Six different tests are derived and shown to correspond to highly effective DRAM tests in practice
Keywords
DRAM chips; integrated circuit testing; logic testing; DRAM faults; Spice simulation; general memory testing; memory tests; Fault detection; Fault diagnosis; Laboratories; Logic; Mathematics; Random access memory; Read-write memory; Resource description framework; Space technology; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2006. ITC '06. IEEE International
Conference_Location
Santa Clara, CA
ISSN
1089-3539
Print_ISBN
1-4244-0292-1
Electronic_ISBN
1089-3539
Type
conf
DOI
10.1109/TEST.2006.297701
Filename
4079379
Link To Document