DocumentCode
3360778
Title
A 1.5 GHz spread spectrum clock generator with a 5000ppm piecewise linear modulation
Author
Song, Minyoung ; Ahn, Sunghoon ; Jung, Inhwa ; Kim, Yongtae ; Kim, Chulwoo
Author_Institution
Korea Univ., Seoul
fYear
2008
fDate
21-24 Sept. 2008
Firstpage
455
Lastpage
458
Abstract
A spread spectrum clock generator is implemented in a 0.18 mum CMOS process employing the proposed piecewise linear modulation profile to significantly reduce EMI with a simple implementation. A high resolution fractional divider to reduce quantization noise from the modulation is proposed as well. A peak power reduction level of 14.2 dB with 5000 ppm down spreading and 27.88 pspp of jitter in the SSCG without modulation are measured.
Keywords
CMOS integrated circuits; electromagnetic interference; piecewise linear techniques; signal generators; timing circuits; CMOS process; EMI; frequency 1.5 GHz; high resolution fractional divider; piecewise linear modulation; quantization noise; spread spectrum clock generator; 1f noise; CMOS process; Clocks; Electromagnetic interference; Jitter; Noise reduction; Piecewise linear techniques; Power measurement; Quantization; Spread spectrum communication;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE
Conference_Location
San Jose, CA
Print_ISBN
978-1-4244-2018-6
Electronic_ISBN
978-1-4244-2019-3
Type
conf
DOI
10.1109/CICC.2008.4672119
Filename
4672119
Link To Document