Fully-Digital Time-To-Digital Converter for ATE with Autonomous Calibration

Precise and fast time measurements have many applications in tests. An ATE that integrates a general purpose time-to-digital converter (TDC) into each pin benefits from a fully digital implementation and autonomous calibration. This paper presents two novel calibration methods and supporting HW for a vernier delay line (VDL) based TDC. A novel linearity calibration uses the deviation from a uniform code density, when measuring a large number of uncorrelated events from a local ring oscillator. A novel coarse/fine calibration corrects for supply voltage induced delay fluctuations by injecting a known time interval into the VDL after each measured event. Design parameters for 90 nm CMOS are described. SPICE and MATLAB simulations and a detailed statistical analysis indicate post calibration errors of 2 ps RMS with unlimited dynamic range, at sample rates of 100 Msa/s