DocumentCode
3361311
Title
Active deskew in injection-locked clocking
Author
Zhang, Lin ; Ciftcioglu, Berkehan ; Wu, Hui
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Rochester, Rochester, NY
fYear
2008
fDate
21-24 Sept. 2008
Firstpage
567
Lastpage
570
Abstract
This paper presents an injection-locked clock (ILC) distribution system with a new active deskew mechanism based on the built-in phase tuning of injection-locked oscillators (ILO). The proposed technique removes the required deskew delay lines and associated power dissipation, clock latency and jitter accumulation in conventional active deskew schemes. A test chip was fabricated in a standard 0.18 mum digital CMOS process to demonstrate this new technique. Working at 3.5 GHz clock frequency, the ILOs in the ILC achieved 40 ps deskew range with a step size of 1.25 ps. The deskew loop successfully achieved a skew reduction from the preset value of 16 ps to 2 ps. The cycle-to-cycle jitter degradation from clock input to clock output is measured only 0.04 ps.
Keywords
CMOS integrated circuits; circuit tuning; injection locked oscillators; jitter; active deskew mechanism; associated power dissipation; built-in phase tuning; clock latency; cycle-to-cycle jitter degradation; deskew delay lines; digital CMOS process; distribution system; injection-locked clocking; injection-locked oscillators; jitter accumulation; CMOS process; Clocks; Degradation; Delay lines; Frequency; Injection-locked oscillators; Jitter; Power dissipation; Testing; Tuning;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE
Conference_Location
San Jose, CA
Print_ISBN
978-1-4244-2018-6
Electronic_ISBN
978-1-4244-2019-3
Type
conf
DOI
10.1109/CICC.2008.4672148
Filename
4672148
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