DocumentCode :
3361750
Title :
Nonoverlapping Cuspid-Pulsed Flip-Flop
Author :
Min-Su Kim ; Bai-Sun Kong ; Chil-Gee Lee ; Tae-Hyung Kim ; Sung Bae Park ; Young-Hyun Jim
Author_Institution :
Sungkyunkwan Univ., Suwon
fYear :
2007
fDate :
11-14 Dec. 2007
Firstpage :
158
Lastpage :
161
Abstract :
This paper presents novel nonoverlapping cuspid-pulsed flip-flop, which consists of a cuspid-pulse generator and a domino-like latch. The cuspid-pulse generator supplies the domino-like latch with nonoverlapping negative and positive cuspid-shape pulses. The flip-flop allows the elimination of the second stage in the conventional semi-dynamic pulse-based flip-flops, leading to a significant reduction of data-to-output latency. The simulation results using a 65 nm CMOS process technology indicate that the data-to-output delay of the proposed flip-flop was decreased by up to 63%. They also indicate that the improvement on energy-delay product was up to 75% as compared to the conventional flip-flops.
Keywords :
CMOS integrated circuits; flip-flops; CMOS process technology; cuspid-pulse generator; data-to-output delay; data-to-output latency; domino-like latch; nonoverlapping cuspid-pulsed flip-flop; nonoverlapping negative; positive cuspid-shape pulses; CMOS process; CMOS technology; Clocks; Delay; Energy consumption; Flip-flops; Latches; MOS devices; Master-slave; Pulse generation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2007. ICECS 2007. 14th IEEE International Conference on
Conference_Location :
Marrakech
Print_ISBN :
978-1-4244-1377-5
Type :
conf
DOI :
10.1109/ICECS.2007.4510954
Filename :
4510954
Link To Document :
بازگشت