An efficient implementation of RSA for low cost microprocessors

This paper describes an efficient implementation of RSA cryptographic operations that can be used through a wide range of processors starting from 8 bit low cost microprocessor up to 64 bit expensive processor. The proposed implementation method reduces the memory usage, and uses generic C code that can be used with minor modification in different word length processors. The final implementation is optimized to achieve faster execution over specific target processors. Various optimization techniques are studied, like code optimization, algorithm alternation and FPGA acceleration.