DocumentCode :
3362411
Title :
HLS design flow for the synthesis of multimode systems under multiple constraints
Author :
Gal, Bertrand Le ; Bossuet, Lilian ; Khan, Shafqat ; Casseau, Emmanuel
Author_Institution :
Bordeaux 1 Univ., Bordeaux
fYear :
2007
fDate :
11-14 Dec. 2007
Firstpage :
314
Lastpage :
317
Abstract :
In a mobile society, more and more devices need to continuously adapt to changing environments. Such mode switches can be smoothly done in software using a general purpose or digital signal processor though hardware components can cope with throughput and power constraints. In this paper we propose a methodology to implement multiple configuration (or mode) and multi-constraint systems into a single circuit using conventional hardware technologies. Results show the interest of the methodology.
Keywords :
digital signal processing chips; HLS design flow; digital signal processor; hardware components; mode switches; multiconstraint systems; multimode systems; multiple configuration; multiple constraints; power constraints; single circuit; Application software; Computer architecture; Design optimization; Energy consumption; Flow graphs; Hardware; High level synthesis; Reconfigurable logic; Resource management; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2007. ICECS 2007. 14th IEEE International Conference on
Conference_Location :
Marrakech
Print_ISBN :
978-1-4244-1377-5
Electronic_ISBN :
978-1-4244-1378-2
Type :
conf
DOI :
10.1109/ICECS.2007.4510993
Filename :
4510993
Link To Document :
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