DocumentCode :
3362513
Title :
A CMOS operational floating current conveyor circuit
Author :
Elsayed, Fahmi ; Ibrahim, Mohamed F. ; Ghallab, Yehya H. ; Badawy, Wael
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada
fYear :
2009
fDate :
15-17 Nov. 2009
Firstpage :
1
Lastpage :
4
Abstract :
A new operational floating current conveyor (OFCC) circuit is presented. The presented OFCC circuit is the first CMOS OFCC circuit which is suitable for low power VLSI applications. The proposed OFCC circuit is designed to achieve two design goals. The first designed circuit is a low power consumption OFCC circuit (LBW design) while the second design is a high bandwidth OFCC circuit (HBW design) with power consumption sacrifice. Both designs are designed and simulated using TSMC 90 nm technology kit in Cadence.
Keywords :
CMOS analogue integrated circuits; VLSI; current conveyors; integrated circuit design; CMOS OFCC circuit; CMOS operational floating current conveyor circuit; TSMC 90 nm technology; circuit design; power consumption; size 900 nm; Bandwidth; CMOS technology; Circuits; Energy consumption; Feedback amplifiers; Impedance; Lab-on-a-chip; Radiofrequency interference; Very large scale integration; Voltage; Current mode device; VLSI; current conveyor; current feedback amplifier; operational floating current conveyor;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design and Test Workshop (IDT), 2009 4th International
Conference_Location :
Riyadh
Print_ISBN :
978-1-4244-5748-9
Type :
conf
DOI :
10.1109/IDT.2009.5404131
Filename :
5404131
Link To Document :
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