DocumentCode
3362609
Title
FPGA based selective harmonic elimination pulse width modulation technique
Author
Saied, Basil M. ; Dawwd, Shefa A. ; Al-Soufi, Ahmad S.
Author_Institution
Electr. Eng. Dept., Univ. of Mosul, Mosul, Iraq
fYear
2009
fDate
15-17 Nov. 2009
Firstpage
1
Lastpage
6
Abstract
The paper presents a reliable method to generate on line pulse width modulation (PWM) signals with selected harmonic elimination (SHE) by using field programmable gate array (FPGA). These signals is used to drive voltage source inverter. Due to the complexity of solving the nonlinear equations, and impossibility to achieve the solution in real time and on line, therefore the solution is obtained off line for wide range of modulation index and as a results a huge of switching data to produce PWM patterns. These data are trained by implementing artificial neural networks (ANN). Then the ANN is hardwarely implemented by using an FPGA. The utilization of FPGA to ANN becomes very attractive since it allows fast hardware design and modification at low costs. This will enable to use SHEPWM to be applied on real time and on line. The details of the implementation on FPGA are described.
Keywords
PWM invertors; field programmable gate arrays; harmonics suppression; neural nets; power engineering computing; ANN; FPGA-based selective harmonic elimination; artificial neural networks; field programmable gate array; modulation index; nonlinear equations; pulse width modulation technique; voltage source inverter; Artificial neural networks; Field programmable gate arrays; Modulation coding; Nonlinear equations; Pulse generation; Pulse width modulation; Pulse width modulation inverters; Signal generators; Space vector pulse width modulation; Voltage; FPGA; SHEPWM; VHDL; VSI;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Test Workshop (IDT), 2009 4th International
Conference_Location
Riyadh
Print_ISBN
978-1-4244-5748-9
Type
conf
DOI
10.1109/IDT.2009.5404137
Filename
5404137
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