Title :
CAN bus analyzer and emulator
Author :
Kashif, H. ; Bahig, G. ; Hammad, S.
Author_Institution :
Comput. & Syst. Eng. Dept., Ain Shams Univ., Cairo, Egypt
Abstract :
A need arises when using CAN buses to monitor the data on the bus as well as having the ability to inject further data onto it. This provides the ability to fully test a CAN network on both the frame level and the bit level. This paper introduces a new CAN bus analyzer and emulator. The proposed system on chip (SoC) is verified by simulation and implementation on FPGA board. Real time results show the efficiency of the SoC in bus analysis and CAN node emulation.
Keywords :
controller area networks; field programmable gate arrays; system-on-chip; CAN bus analyzer; FPGA board; SoC; data monitoring; emulators; system on chip; Automotive engineering; Consumer electronics; Field programmable gate arrays; Hardware; Monitoring; Protocols; Standards development; System-on-a-chip; Systems engineering and theory; Testing; Automotive Testing; CAN; FPGA;
Conference_Titel :
Design and Test Workshop (IDT), 2009 4th International
Conference_Location :
Riyadh
Print_ISBN :
978-1-4244-5748-9
DOI :
10.1109/IDT.2009.5404142
