DocumentCode
3363216
Title
Impact of SOI History Effect on Random Data Signals
Author
Jenkins, K.A. ; Kim, S. ; Kowalczyk, S.P. ; Friedman, D.
Author_Institution
IBM, Yorktown Heights
fYear
2007
fDate
May 30 2007-June 1 2007
Firstpage
1
Lastpage
4
Abstract
The impact of silicon-on-insulator (SOI) history effect in communication circuits containing delay chains is experimentally evaluated. In previous work, SOI history has been seen to change data pulse widths by 5% to 15% for fixed data patterns. In contrast, this work shows that data scrambling and DC balance reduce the effect to 1% or less, eliminating history effect as a concern for such communication circuits.
Keywords
CMOS digital integrated circuits; data communication; delays; silicon-on-insulator; telecommunication channels; timing circuits; DC balance reduction; SOI CMOS technologies; SOI history effect; Si; communication circuits; data pulse widths; data scrambling; delay chains; fixed data patterns; random data signals; silicon-on-insulator; Buffer storage; CMOS technology; Circuits; Clocks; Delay effects; History; Logic devices; Silicon on insulator technology; Timing; Voltage; SOI; communications; data; floating body; history effect;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuit Design and Technology, 2007. ICICDT '07. IEEE International Conference on
Conference_Location
Austin, TX
Print_ISBN
1-4244-0757-5
Electronic_ISBN
1-4244-0757-5
Type
conf
DOI
10.1109/ICICDT.2007.4299531
Filename
4299531
Link To Document