Nitrogen Profile and Dielectric Cap Layer (Al2O3, Dy2O3, La2O3) Engineering on Hf-Silicate

We have investigated Al₂O₃, Dy₂O₃, and La₂O₃ as dielectric cap layers for use in low V_t CMOS integration schemes. The cap layers are found to reduce the V_t by 0.2 V for pFET, and with 0.2 V and 0.5 V for nFET, respectively. Subsequently, we report on the benefits of performing the nitridation (by means of DPN) after cap deposition, instead of before. This allows better control of the nitrogen profile in the stack, resulting in improvement of V_t reduction, V_t wafer uniformity, mobility and BTI characteristics. Finally, we observe that the V_t shift induced by the dielectric cap layer significantly depends on the N-content of the metal gate. After reporting on these three key stack characteristics, we propose two practical single metal CMOS integration schemes.