A physical GTO model for circuit simulation

Purely based on semiconductor physics, a nonquasistatic gate turn-off thyristor (GTO) model for network simulators is developed. Since the basic semiconductor equations can only be solved by CPU-time-consuming 2-D device simulations (e.g. by PISCES), this approach is not suited for the simulation of topologies. But taking advantage of the device understanding gained from 2-D device simulations (dynamics of carrier concentrations) and experimental results, the partial differential equations can be reduced to a system of ordinary differential equations (state equations). The central part of the model is a segmentation approach to solve the diffusion equation for charge carriers in the injected regions. Thus, only physical and geometric device parameters are necessary in order to adjust the model to a specific device. Although the proposed model is one-dimensional, it allows the simulation of important dynamic characteristics such as current tail, dynamic avalanche, and storage time in a complex circuit surrounding