DocumentCode
3363955
Title
Soft-Error Charge-Sharing Mechanisms at Sub-100nm Technology Nodes
Author
Massengill, L.W. ; Amusan, O.A. ; DasGupta, S. ; Sternberg, A.L. ; Black, J.D. ; Witulski, A.F. ; Bhuva, B.L. ; Alles, M.L.
Author_Institution
Vanderbilt Univ., Nashville
fYear
2007
fDate
May 30 2007-June 1 2007
Firstpage
1
Lastpage
4
Abstract
Analyses of ion-induced charge sharing effects at the 90 nm CMOS technology node are discussed. Two mechanisms leading to enhanced charge collection and increased soft error sensitivity are presented.
Keywords
CMOS integrated circuits; sensitivity analysis; CMOS technology node; charge collection; ion induced charge sharing effects; size 90 nm; soft error sensitivity; sub 100 nm technology; CMOS digital integrated circuits; CMOS technology; Error analysis; Integrated circuit technology; Isolation technology; Radiation hardening; Single event upset; Space technology; Structural engineering; Voltage; SER; SEU mechanisms; charge collection; charge sharing; single event effects; soft errors;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuit Design and Technology, 2007. ICICDT '07. IEEE International Conference on
Conference_Location
Austin, TX
Print_ISBN
1-4244-0757-5
Electronic_ISBN
1-4244-0757-5
Type
conf
DOI
10.1109/ICICDT.2007.4299576
Filename
4299576
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