High voltage SOI CMOS IC technology for driving plasma display panels

Author

Kobayashi, Kenya ; Yanagigawa, Hiroshi ; Mori, Kazuhisa ; Yamanaka, Shuichi ; Fujiwara, Akira

Author_Institution

NEC Corp., Kawasaki, Japan

fYear

1998

fDate

3-6 Jun 1998

Firstpage

141

Lastpage

144

Abstract

We have developed a new high voltage CMOS (HV-CMOS) IC technology by using 5 μm-thick SOI. In this technology, trench isolation and a 0.5 μm rule CMOS process are also adopted. We have examined seven series HV-CMOS fabrication processes in different voltage ratings (in which the maximum voltage rating was 250 V) and optimized their characteristics respectively. The HV-CMOS IC with full-CMOS type level shifter is suited to low power consumption color plasma display panels (C-PDPs) and high-speed switching has been confirmed. The chip size of the developed PDP scan driver IC could be reduced by 40% compared with the conventional chip

Keywords

CMOS integrated circuits; circuit optimisation; colour; driver circuits; gas-discharge displays; integrated circuit design; power integrated circuits; silicon-on-insulator; 0.5 micron; 250 V; 5 micron; CMOS characteristics optimization; CMOS process; HV-CMOS IC; HV-CMOS IC technology; PDP scan driver IC; SOI; Si-SiO₂; chip size; color plasma display panels; full-CMOS type level shifter; high voltage SOI CMOS IC technology; high-speed switching; plasma display panel driver; plasma display panels; power consumption; series HV-CMOS fabrication processes; trench isolation; voltage ratings; CMOS integrated circuits; CMOS process; CMOS technology; Driver circuits; Fabrication; Flat panel displays; Isolation technology; Plasma displays; Substrates; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Semiconductor Devices and ICs, 1998. ISPSD 98. Proceedings of the 10th International Symposium on

Conference_Location

Kyoto

ISSN

1063-6854

Print_ISBN

0-7803-4752-8

Type

conf

DOI

10.1109/ISPSD.1998.702655

Filename

702655