Hardware Architectures for the Generalized Finite Automata Algorithm

A novel video coding scheme has been proposed previously to address the increasing demands on bitrate improvements. This scheme relies on the generalized finite automata (GFA) representation to encode a video sequence. However, the computational workload of the scheme may overwhelm software implementations to the point of hampering the throughput required by the target video applications. This paper presents an algorithmic analysis of GFA as a starting point for applying a mapping methodology in order to explore possible array architectures suitable for its acceleration. The performance of potential candidate architectures are evaluated on a set of appropriate performance parameters. The result of this evaluation shows that a two-dimensional systolic array with two different types of processors is the best promising architecture for GFA acceleration.