High speed acquisition and storage platform for SDR applications development

Author

Cogo, Jorge ; García, Javier G. ; Roncagliolo, Pedro A. ; Muravchik, Carlos H.

Author_Institution

Lab. de Electron. Ind., Control e Instrumentacion (LEICI), Univ. Nac. de La Plata (UNLP), La Plata, Argentina

fYear

2011

fDate

13-15 April 2011

Firstpage

19

Lastpage

24

Abstract

In this work we present the design of an FPGA based platform for acquiring and storing signals for SDR applications. The system comprises an embedded RISC processor, an A/D converter, RAM memory chips and a DMA controller core. This last component was designed from scratch to meet the high data rate and bulk requirements. The software needed to control the system was also developed and a Graphical User Interface was written to allow a user to interact with the system from a host PC. The developed system was successfully used for offline processing the received signals of a GNSS RF front-end.

Keywords

field programmable gate arrays; random-access storage; signal detection; software radio; A/D converter; DMA controller core; FPGA based platform; GNSS RF front-end; RAM memory chips; SDR; embedded RISC processor; graphical user interface; high speed acquisition; received signal processing; software defined radio; storage platform; Clocks; Field programmable gate arrays; Global Navigation Satellite Systems; Graphical user interfaces; Registers; SDRAM; Software;

fLanguage

English

Publisher

ieee

Conference_Titel

Programmable Logic (SPL), 2011 VII Southern Conference on

Conference_Location

Cordoba

Print_ISBN

978-1-4244-8847-6

Type

conf

DOI

10.1109/SPL.2011.5782619

Filename

5782619