• DocumentCode
    3364710
  • Title

    An Euler solver accelerator in FPGA for computational fluid dynamics applications

  • Author

    Sanchez-Roman, Diego ; Sutter, Gustavo ; Lopez-Buedo, Sergio ; Gonzalez, Ivan ; Gomez-Arribas, Francisco J. ; Aracil, Javier

  • Author_Institution
    Escuela Politec. Super., Univ. Autonoma de Madrid, Madrid, Spain
  • fYear
    2011
  • fDate
    13-15 April 2011
  • Firstpage
    149
  • Lastpage
    154
  • Abstract
    This paper addresses the problem of accelerating Computational Fluid Dynamics (CFD) applications, utilized by aeronautical engineers to create more efficient and aerodynamic designs. CFD applications require intensive floating point calculations, so they are usually executed on High-Performance Computing (HPC) systems. Here, we study the HW implementation of a cell-vertex finite volume algorithm to solve Euler equations, using the XtremeData XD2000i in-socket FPGA accelerator. Taking advantage of high-level language synthesis tools together with optimized low level components, a HW-accelerated implementation that achieved speedups up to 13.25× could be created in a short time.
  • Keywords
    computational fluid dynamics; field programmable gate arrays; finite volume methods; Euler equations; Euler solver accelerator; HW-accelerated implementation; XtremeData XD2000i in-socket FPGA accelerator; aerodynamic designs; cell-vertex finite volume algorithm; computational fluid dynamics; floating point calculations; high-level language synthesis tools; high-performance computing systems; optimized low level components; Acceleration; Algorithm design and analysis; Computational fluid dynamics; Field programmable gate arrays; Optimization; Pipeline processing; Pipelines;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Programmable Logic (SPL), 2011 VII Southern Conference on
  • Conference_Location
    Cordoba
  • Print_ISBN
    978-1-4244-8847-6
  • Type

    conf

  • DOI
    10.1109/SPL.2011.5782640
  • Filename
    5782640