Spanning forests in constant time using FPGAS applied to network design problems

Problems involving network design can be found in many real world applications such as power systems, vehicle routing, telecommunication networks, phylogenetic trees, among others. These problems involve thousands or millions of input variables and often need information and solution in real time. In general, they are computationally complex (NP-Hard). In this context, metaheuristics like evolutionary algorithms have been investigated. Recently, researches have shown that the performance of evolutionary algorithms for network design problems can be significantly increased by means of more appropriate dynamic data structures (encodings). To achieve high performance, we parallelized the application via a dynamic data structure, called node-depth encoding for representation of a set (population) of spanning forests. This paper proposes an FPGA-based hardware architecture, denominated Hardware-Parallelized NDE (HPNDE), which is able to generate spanning trees (forests) in a constant average running time O(1), enabling its application in real large-scale problems, given an FPGA with enough resources to implement such structure. The parallelized approach is 1.5k times faster than its sequential counterpart.