Waiting time optimization of non-deterministic tests at ATE

One of the important steps that a semiconductor chip goes through is electrical testing, which typically is performed on an automated test equipment (ATE) platform. The primary goal of this step is to achieve maximum test coverage while minimizing testing time as much as optimal. There are various test methods used in testing, ranging from a simple continuity test to implementations such as built-in self-tests (BISTs) in which the chip is instructed to run internally and the test program checks for the result only when it is done. BISTs are, in a way, non-deterministic in nature; testing time can vary depending on the internal clock frequency at which the test is run and other factors based on the chip´s operation. One way to optimize testing time of non-deterministic tests at ATE is to read the results register immediately on completion of the BIST execution, and not wait for a hard-coded amount of time to elapse - typically, an amount of time based on the slowest possible test execution to complete. This paper discusses a method that eliminates unnecessary time lost waiting for data that may have long arrived.