Title :
On an efficient method for estimating the interconnection complexity of designs and on the existence of region III in Rent´s rule
Author :
Stroobandt, Dirk
Author_Institution :
Dept. of Electron. & Inf. Syst., Ghent Univ., Belgium
Abstract :
The interconnection complexity of digital designs can be captured by the well-known Rent exponent, described by Landman and Russo [1971]. In this paper we present an efficient method for obtaining the Rent exponent of a design through a hierarchical partitioning algorithm. Experimental results not only confirm the Landman and Russo observations of a region I and region II but also show a hitherto unknown region 12%
Keywords :
VLSI; circuit layout CAD; digital integrated circuits; integrated circuit interconnections; integrated circuit layout; logic CAD; logic partitioning; IC layout; Rent´s rule; VLSI; digital designs; hierarchical partitioning algorithm; interconnection complexity; region I; region II; region III; Algorithm design and analysis; Information systems; Integrated circuit interconnections; LAN interconnection; Logic design; Partitioning algorithms; Pins; Production; Routing; Very large scale integration;
Conference_Titel :
VLSI, 1999. Proceedings. Ninth Great Lakes Symposium on
Conference_Location :
Ypsilanti, MI
Print_ISBN :
0-7695-0104-4
DOI :
10.1109/GLSV.1999.757445
