DocumentCode :
3365097
Title :
Low Power Design in Deep Submicron 65 & 45 nm Technologies
Author :
Piguet, Christian
Author_Institution :
CSEM, Neuchatel
fYear :
2007
fDate :
11-14 Dec. 2007
Firstpage :
915
Lastpage :
918
Abstract :
This paper is an introduction to a special session about low power design in 65 and 45 nm technologies and consisting in the next three papers about logic design, high-level models for power estimation and processor core design in these very advanced technologies. This introduction will consider the new design problems in 65 and 45 nm technologies and will conclude on possible futures for microelectronics.
Keywords :
integrated circuit design; logic design; low-power electronics; logic design; low power design; microelectronics; processor core design; size 45 nm to 65 nm; Arithmetic; Cache memory; Circuits; Clocks; Design automation; Digital signal processing; Microelectronics; Paper technology; Process design; Radio frequency;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2007. ICECS 2007. 14th IEEE International Conference on
Conference_Location :
Marrakech
Print_ISBN :
978-1-4244-1377-5
Electronic_ISBN :
978-1-4244-1378-2
Type :
conf
DOI :
10.1109/ICECS.2007.4511140
Filename :
4511140
Link To Document :
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