Implementation of a Gigabit Per Second Millimetre Wave Transceiver on CMOS

Modern systems require transceivers that deliver gigabit speeds, are smaller in size, and have lower power consumption and cost. This motivates research to develop transceiver-on-chip and transceiver-in-a-package technologies. Recent advances in millimetre wave electronics have meant that significant portions of the system can now be integrated onto a single substrate or package. In order to achieve low costs and high digital integration CMOS is the process of choice as CMOS is the standard and a cost effective process for building digital circuits. Unfortunately compared to other much more expensive processes such as SiGe and GaAs, CMOS has greater process variability, lower carrier mobility constants, and smaller device breakdown voltages. This makes millimetre wave wireless transceiver on a chip design particularly challenging. In this paper we outline the development of a gigabit transceiver-on-chip using CMOS and outline the performance of the fabricated components.