Analysis of Spatial Temperature Distribution in ICs

Technology scaling to achieve higher performance and increased functionalities on silicon substrate leads to non uniform temperature distribution across the IC, which will directly impact its performance and reliability. This paper analyzes and discusses the impacts of spatial temperature distribution. A relation between the size of the heat source and the peak temperature rise has been demonstrated. This analytical approach can be implemented in any thermal model. A spatial frequency analysis reveals that for heat sources with larger sizes (i.e. having lower spatial frequencies) the thermal impedance is greater due to the DC component. Sources with small dimensions (higher spatial frequencies) the impedance drops to smaller values due to the presence of AC component in thermal spatial capacitance. Hence, for the same power density, a smaller dimension of hotspot would cause a lesser peak temperature than that of a larger dimension.