New MTCMOS Flip-Flops with Simple Control Circuitry and Low Leakage Data Retention Capability

The previous MTCMOS sequential circuit techniques with data preserving sleep modes require either a distributed sleep switch circuit structure with a significant area overhead or a complex peripheral control circuitry for preserving and restoring the data. Two new master-slave MTCMOS flip-flops with centralized sleep switches providing a low leakage and low overhead sleep mode with data retention capability are presented in this paper. A quasi-SRAM structure is combined with the slave latch of the proposed flip-flops. The already existing sleep signal of the MTCMOS circuitry is also used for controlling the data retention and restoration operations, thereby eliminating the need for any extra control signals with the new flip-flops. Furthermore, the leakage power consumption with the proposed techniques is reduced by up to 42.5% as compared to the previously published MTCMOS circuits.