DocumentCode
3366746
Title
Fast fab scheduling rule selection by ordinal comparison-based simulation
Author
Hsieh, Bo-Wei ; Chen, Chun-Hung ; Chang, Shi-Chung
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear
1999
fDate
1999
Firstpage
53
Lastpage
56
Abstract
In this paper, an ordinal comparison (OC)-based simulation tool is designed and applied to achieve fast selection of wafer release and lot dispatching rule combination for fab operations. By comparing relative orders of performance among scheduling rules to a specified level of confidence, the OC approach reduces simulation time significantly. The tool consists of (1) a discrete event simulator, (2) a fab model database, (3) a library of scheduling rules, (4) a library of performance indices, (5) an ordinal comparator, and (6) a computation budget allocation. Rule selections from a set of prominent fab scheduling rules under frequently considered fab performance indices such as mean and variance of cycle time and smoothness are studied over various time horizons by using a benchmark fab model. Results demonstrate a potential improvement in efficiency over traditional simulation by two orders of magnitude. In addition to insights about static selection of rules over various objectives and time horizons, our simulation studies also indicate the necessity of dynamic selection
Keywords
discrete event simulation; dispatching; electronic engineering computing; integrated circuit manufacture; production control; production engineering computing; benchmark fab model; computation budget allocation; cycle time; discrete event simulator; dynamic selection; fab model database; fast fab scheduling rule selection; lot dispatching rule combination; ordinal comparison-based simulation; performance indices library; scheduling rules library; semiconductor manufacturing; simulation time reduction; simulation tool; wafer release; Computational modeling; Fabrication; Industrial engineering; Investments; Job shop scheduling; Libraries; Probability; Processor scheduling; Production; Systems engineering and theory;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing Conference Proceedings, 1999 IEEE International Symposium on
Conference_Location
Santa Clara, CA
ISSN
1523-553X
Print_ISBN
0-7803-5403-6
Type
conf
DOI
10.1109/ISSM.1999.808736
Filename
808736
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