Performance evaluation of N-well/P-sub photodiodes in 65nm CMOS process

This work explores the n-well/p-substrate photodiode in a deep submicron CMOS process. A CMOS chip is designed featuring different structures of the photodiode. When characterized at a wavelength of 850nm DC responsivities between 0.12 and 0.16 A/W and 3-dB bandwidths of about 6 MHz with a roll-off of about 5.5dB/decade are measured. These investigations are very useful in designing the transimpedance amplifier and equalizer for a fully integrated optical receiver. According to the authors´ knowledge it is the first reported study on n-well/p-sub photodiodes in a 65nm CMOS technology.